Access register

In IBM terminology, an Access Register (AR) is a hardware register in ESA/370 and later mainframe instruction set architectures. Access registers work in conjunction with the general purpose registers, giving a program transparent access to up to sixteen 2 GB address spaces simultaneously. ARs were introduced with ESA/370 in 1988, and supported by the MVS/ESA operating system.[1]

In IBM System/360 architecture all instructions address memory by specifying a 12-bit offset (4096 bytes) from a value in a "base register" with optional indexing. Originally addresses occupied the low-order 24 bits of a base register, allowing a program to access up to 16 MB. System/370-XA extended the architecture to allow 31-bit addressing and address spaces of up to 2 GB.

Enterprise Systems Architecture/370 further expanded addressing capabilities with access registers. Sixteen 32-bit access registers "shadow" the sixteen general-purpose registers. In a processor mode called access-register mode the access register corresponding to the specified base register designates the operand address space to be accessed.[2]: 1–1  The contents of an access register is called an "Access-list entry token" (ALET), which contains an index into a system table identifying the address space.

See also

References

  1. ^ Babcocl, Charles (Feb 22, 1988). "IBM opens data trove to E-model users". Computerworld. Retrieved Mar 5, 2020.
  2. ^ IBM Corporation (August 1988). IBM Enterprise Systems Architecture/370 Principles of Operation (PDF). Retrieved Mar 6, 2020.
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